Anwsers To Assignment 5  - cs1541
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6.3
	loop: 	addi $3, $3, 4
		beq $3, $4, loop
		lw $2, 96($3)		<-- note that it is changed to 96 since	
					it had to move down one instruction



6.12

The forwarding unit is checking if it should forward or not.
It checks the instrustions at the 4th and 5th stage to see if it
will write it register file and if the ALU is used as input.

Comparisons:
		8 = 4
		8 = 1
		9 = 4
		9 = 1



6.16

				Bits
	Inputs:

	ID/EX.RegisterRs	5
	ID/EX.RegisterRt	5
	EX/MEM.RegisterRd	5
	EX/MEM.RegWrite		1
	MEM/WB.RegisterRd	5
	MEM/WB.RegWrite		1


				Bits
	Outputs:

	ForwardA		2
	ForwardB		2



6.23

	lw   $3, 0($5)
	add  $7, $7, $3
	sw   $6, 0($5)
	lw   $4, 4($5)
	add  $8, $8, $4
	add  $10, $7, $8
	beq  $10, $11, loop



6.29

Even though the instruction count isn't lowered higher performace 
is still gained.  This is because branches are not used and hence 
there are no control hazards.  Data hazards only occur when there 
are dependencies.  All these hazards are handled by forwarding 
(except load-use), and therefore the pipeline won't stall.